The present invention relates to techniques effectively applied to a power metal oxide semiconductor (MOS) type or metal insulator semiconductor (MIS) type semiconductor device (or semiconductor integrated circuit device), and to a manufacturing method for the semiconductor device (or the semiconductor integrated circuit device).
Japanese Unexamined Patent Publication No. 2000-223705 (Patent Document 1) discloses a technique about a trench gate type power MOS field effect transistor (FET) with an embedded contact structure for miniaturization of a gate lead-out portion, that is, with a structure substantially not having the gate lead-out portion, in which an upper surface of a gate electrode made of polysilicon or the like coincides with an upper surface of a semiconductor substrate.
Japanese Unexamined Patent Publication No. 2004-055659 (Patent Document 2) discloses a technique for providing a stepped portion between gate electrode portions of an active region and a gate contact region in a trench-gate type power MOSFET, and for additionally forming an insulating film in the stepped portion for preventing dielectric breakdown at the corner on the upper side of a trench.
Japanese Unexamined Patent Publication No. 2006-202931 (Patent Document 3) or U.S. Patent Application Publication No. 2006-157779 (Patent Document 4) discloses a technique for forming a relatively shallow trench in a surface of a semiconductor substrate for separating adjacent source regions from each other in the power MISFET with the trench gate structure.
Japanese Unexamined Patent Publication No. 2008-42056 (Patent Document 5) or U.S. Patent Application Publication No. 2008-35990 (Patent Document 6) discloses a technique of the power MISFET with the trench gate structure for forming a sidewall spacer around a trench gate electrode whose part protrudes from a surface of a semiconductor substrate, and also a technique for covering the semiconductor substrate surface including upper surfaces of the trench gate electrode and of the sidewall spacer and the like with a silicon nitride film to use the silicon nitride film formed as an etching stopper.
Japanese Unexamined Patent Publication No. 2000-277531 (Patent Document 7) or U.S. Pat. No. 6,706,604 (Patent Document 8) discloses a power MISFET structure including a protruding trench gate structure, and a manufacturing method thereof.    [Patent Document 1] Japanese Unexamined Patent Publication No. 2000-223705    [Patent Document 2] Japanese Unexamined Patent Publication No. 2004-055659    [Patent Document 3] Japanese Unexamined Patent Publication NO. 2006-202931    [Patent Document 4] U.S. Patent Application Publication NO. 2006-157779    [Patent Document 5] Japanese Unexamined Patent Publication No. 2008-42056    [Patent Document 6] U.S. Patent Application Publication No. 2008-35990    [Patent Document 7] Japanese Unexamined Patent Publication No. 2000-277531    [Patent Document 8] U.S. Pat. No. 6,706,604